Current parallel graphics data processing includes systems and methods developed to perform specific operations on graphics data such as, for example, linear interpolation, tessellation, rasterization, texture mapping, depth testing, etc. Traditionally, graphics processors used fixed function computational units to process graphics data. However, more recently, portions of graphics processors have been made programmable, enabling such processors to support a wider variety of operations for processing vertex and fragment data.
To further increase performance, graphics processors typically implement processing techniques such as pipelining that attempt to process, in parallel, as much graphics data as possible throughout the different parts of the graphics pipeline. Parallel graphics processors with single instruction, multiple thread (SIMT) architectures are designed to maximize the amount of parallel processing in the graphics pipeline. In an SIMT architecture, groups of parallel threads attempt to execute program instructions synchronously together as often as possible to increase processing efficiency. A general overview of software and hardware for SIMT architectures can be found in Shane Cook, CUDA Programming Chapter 3, pages 37-51 (2013).
Increasingly, graphics processors are being implemented within global shared memory (GSM) systems coupled via an interconnect fabric to communicate between multiple processing nodes. Forward progress guarantee is a requirement for highly parallel graphics processors in situations where various independent streams are simultaneously accessing system resources via the fabric.
Forward progress is typically intended for applications in which parallel execution of separate streams access non-dependent resources. However, providing forward progress guarantees for parallel hardware pipelines is complicated due to the possible occurrence of events that may block a pipeline (e.g., events associated with dependencies). For example, many different streams may be converged on memory access paths during access to system resources, which may result in various dependencies that may block independent streams.